The present disclosure relates to a storage control apparatus. Specifically, the present disclosure relates to a storage control apparatus that performs storage control for a memory that stores an error correcting code along with data, a storage apparatus, and a processing method therefor.
From the past, such a technology that a storage (auxiliary storage apparatus) is further provided to an information processing system including a processor and a work memory thereof (main storage apparatus) to increase a storage capacity has been developed. In the information processing system, a DRAM (dynamic random access memory) or the like is used as a work memory. On the other hand, a non-volatile memory (NVM) may be sometimes used as a storage. The non-volatile memory is roughly classified into a flash memory that deals with a data access on a large size basis and a non-volatile random access memory (NVRAM) capable of performing a rapid random access on a small size basis. Here, as a typical example of a flash memory, a NAND flash memory is cited. On the other hand, examples of a non-volatile RAM include a PCRAM (phase-change RAM), an MRAM (magneto-resistive RAM), a ReRAM (resistance RAM), and the like.
In a non-volatile memory in related art, in addition to a typical read method, a read method having high accuracy but involving a read time has been proposed (see, for example, Japanese Patent Application Laid-open No. 2011-165297). That is, a dynamic read, which is a typical high-speed read method having relatively low accuracy, and a static read, which is a relatively low-speed read method having high accuracy, are disclosed.